Binary subtraction, carry bit not set?
I've encountered a situation that seems a bit unintuitive when dealing with binary subtraction and the NZCV flag bits.
Consider the following values
0xF7 0b 1111 0111
0xFF 0b 1111 1111
If these are both considered to be 8B values where
0x000000F7 0b 0000 .... 0000 1111 0111
0x000000FF 0b 0000 .... 0000 1111 1111
When subtracted the end result is
0x FF FF FF F8 0b 1111 .... 1000
I understand how this result is found but I don't understand why the carry bit is not set for this operation.
To my knowledge, the carry bit is set when the MSB is borrowed from, is that not the case here?
assembly binary flags
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
add a comment |
I've encountered a situation that seems a bit unintuitive when dealing with binary subtraction and the NZCV flag bits.
Consider the following values
0xF7 0b 1111 0111
0xFF 0b 1111 1111
If these are both considered to be 8B values where
0x000000F7 0b 0000 .... 0000 1111 0111
0x000000FF 0b 0000 .... 0000 1111 1111
When subtracted the end result is
0x FF FF FF F8 0b 1111 .... 1000
I understand how this result is found but I don't understand why the carry bit is not set for this operation.
To my knowledge, the carry bit is set when the MSB is borrowed from, is that not the case here?
assembly binary flags
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
Subtract 0xff is the same as add 0x1. And add 0x1 should not set the carry bit for your example. Btw., which CPU arch is your question about? ARM?
– geza
Nov 13 '18 at 8:57
ARM M0+, is this a 2's complement thing?
– MKUltra
Nov 13 '18 at 9:00
1
On ARM, the carry bit is inverted for subtractions. So carry is set if no borrow happened and vice versa.
– fuz
Nov 13 '18 at 9:08
add a comment |
I've encountered a situation that seems a bit unintuitive when dealing with binary subtraction and the NZCV flag bits.
Consider the following values
0xF7 0b 1111 0111
0xFF 0b 1111 1111
If these are both considered to be 8B values where
0x000000F7 0b 0000 .... 0000 1111 0111
0x000000FF 0b 0000 .... 0000 1111 1111
When subtracted the end result is
0x FF FF FF F8 0b 1111 .... 1000
I understand how this result is found but I don't understand why the carry bit is not set for this operation.
To my knowledge, the carry bit is set when the MSB is borrowed from, is that not the case here?
assembly binary flags
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
I've encountered a situation that seems a bit unintuitive when dealing with binary subtraction and the NZCV flag bits.
Consider the following values
0xF7 0b 1111 0111
0xFF 0b 1111 1111
If these are both considered to be 8B values where
0x000000F7 0b 0000 .... 0000 1111 0111
0x000000FF 0b 0000 .... 0000 1111 1111
When subtracted the end result is
0x FF FF FF F8 0b 1111 .... 1000
I understand how this result is found but I don't understand why the carry bit is not set for this operation.
To my knowledge, the carry bit is set when the MSB is borrowed from, is that not the case here?
assembly binary flags
assembly binary flags
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
asked Nov 13 '18 at 8:39
MKUltraMKUltra
939
939
Subtract 0xff is the same as add 0x1. And add 0x1 should not set the carry bit for your example. Btw., which CPU arch is your question about? ARM?
– geza
Nov 13 '18 at 8:57
ARM M0+, is this a 2's complement thing?
– MKUltra
Nov 13 '18 at 9:00
1
On ARM, the carry bit is inverted for subtractions. So carry is set if no borrow happened and vice versa.
– fuz
Nov 13 '18 at 9:08
add a comment |
Subtract 0xff is the same as add 0x1. And add 0x1 should not set the carry bit for your example. Btw., which CPU arch is your question about? ARM?
– geza
Nov 13 '18 at 8:57
ARM M0+, is this a 2's complement thing?
– MKUltra
Nov 13 '18 at 9:00
1
On ARM, the carry bit is inverted for subtractions. So carry is set if no borrow happened and vice versa.
– fuz
Nov 13 '18 at 9:08
Subtract 0xff is the same as add 0x1. And add 0x1 should not set the carry bit for your example. Btw., which CPU arch is your question about? ARM?
– geza
Nov 13 '18 at 8:57
Subtract 0xff is the same as add 0x1. And add 0x1 should not set the carry bit for your example. Btw., which CPU arch is your question about? ARM?
– geza
Nov 13 '18 at 8:57
ARM M0+, is this a 2's complement thing?
– MKUltra
Nov 13 '18 at 9:00
ARM M0+, is this a 2's complement thing?
– MKUltra
Nov 13 '18 at 9:00
1
1
On ARM, the carry bit is inverted for subtractions. So carry is set if no borrow happened and vice versa.
– fuz
Nov 13 '18 at 9:08
On ARM, the carry bit is inverted for subtractions. So carry is set if no borrow happened and vice versa.
– fuz
Nov 13 '18 at 9:08
add a comment |
1 Answer
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The ARM subtraction instructions with carry (SBC, RSC) interpret the carry flag (C) as:
0: means borrow
1: means no borrow
So in your calculation the MSB is borrowed and the carry ist NOT set!
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
Yes, and this is the opposite of how x86's CF works. On x86 it works as the OP was thinking, a non-inverted borrow flag.
– Peter Cordes
Nov 13 '18 at 15:24
add a comment |
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The ARM subtraction instructions with carry (SBC, RSC) interpret the carry flag (C) as:
0: means borrow
1: means no borrow
So in your calculation the MSB is borrowed and the carry ist NOT set!
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
Yes, and this is the opposite of how x86's CF works. On x86 it works as the OP was thinking, a non-inverted borrow flag.
– Peter Cordes
Nov 13 '18 at 15:24
add a comment |
The ARM subtraction instructions with carry (SBC, RSC) interpret the carry flag (C) as:
0: means borrow
1: means no borrow
So in your calculation the MSB is borrowed and the carry ist NOT set!
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
Yes, and this is the opposite of how x86's CF works. On x86 it works as the OP was thinking, a non-inverted borrow flag.
– Peter Cordes
Nov 13 '18 at 15:24
add a comment |
The ARM subtraction instructions with carry (SBC, RSC) interpret the carry flag (C) as:
0: means borrow
1: means no borrow
So in your calculation the MSB is borrowed and the carry ist NOT set!
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
The ARM subtraction instructions with carry (SBC, RSC) interpret the carry flag (C) as:
0: means borrow
1: means no borrow
So in your calculation the MSB is borrowed and the carry ist NOT set!
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
answered Nov 13 '18 at 9:28
MikeMike
2,0071621
2,0071621
Yes, and this is the opposite of how x86's CF works. On x86 it works as the OP was thinking, a non-inverted borrow flag.
– Peter Cordes
Nov 13 '18 at 15:24
add a comment |
Yes, and this is the opposite of how x86's CF works. On x86 it works as the OP was thinking, a non-inverted borrow flag.
– Peter Cordes
Nov 13 '18 at 15:24
Yes, and this is the opposite of how x86's CF works. On x86 it works as the OP was thinking, a non-inverted borrow flag.
– Peter Cordes
Nov 13 '18 at 15:24
Yes, and this is the opposite of how x86's CF works. On x86 it works as the OP was thinking, a non-inverted borrow flag.
– Peter Cordes
Nov 13 '18 at 15:24
add a comment |
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Subtract 0xff is the same as add 0x1. And add 0x1 should not set the carry bit for your example. Btw., which CPU arch is your question about? ARM?
– geza
Nov 13 '18 at 8:57
ARM M0+, is this a 2's complement thing?
– MKUltra
Nov 13 '18 at 9:00
1
On ARM, the carry bit is inverted for subtractions. So carry is set if no borrow happened and vice versa.
– fuz
Nov 13 '18 at 9:08